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static int nxp_plat_initialize(void)
{
u32 addr;
/* Clock control */
NX_CLKGEN_Initialize();
addr = NX_CLKGEN_GetPhysicalAddress(CLOCKINDEX_OF_DWC_GMAC_MODULE);
NX_CLKGEN_SetBaseAddress( CLOCKINDEX_OF_DWC_GMAC_MODULE, (void*)IO_ADDRESS(addr) );
NX_CLKGEN_SetClockSource( CLOCKINDEX_OF_DWC_GMAC_MODULE, 0, 4); // Sync mode for 100 & 10Base-T : External RX_clk
NX_CLKGEN_SetClockDivisor( CLOCKINDEX_OF_DWC_GMAC_MODULE, 0, 1); // Sync mode for 100 & 10Base-T
NX_CLKGEN_SetClockOutInv( CLOCKINDEX_OF_DWC_GMAC_MODULE, 0, CFALSE);
NX_CLKGEN_SetClockDivisorEnable( CLOCKINDEX_OF_DWC_GMAC_MODULE, CTRUE);
/* Reset control */
#ifdef CONFIG_ARCH_S5P4418
NX_RSTCON_Initialize();
addr = NX_RSTCON_GetPhysicalAddress();
NX_RSTCON_SetBaseAddress( (void*)IO_ADDRESS(addr) );
NX_RSTCON_SetnRST(RESETINDEX_OF_DWC_GMAC_MODULE_aresetn_i, RSTCON_ENABLE);
udelay(100);
NX_RSTCON_SetnRST(RESETINDEX_OF_DWC_GMAC_MODULE_aresetn_i, RSTCON_DISABLE);
udelay(100);
NX_RSTCON_SetnRST(RESETINDEX_OF_DWC_GMAC_MODULE_aresetn_i, RSTCON_ENABLE);
udelay(100);
#else /* = CONFIG_ARCH_S5P6818 */
NX_RSTCON_Initialize();
addr = NX_RSTCON_GetPhysicalAddress();
NX_RSTCON_SetBaseAddress( (void*)IO_ADDRESS(addr) );
NX_RSTCON_SetRST(RESETINDEX_OF_DWC_GMAC_MODULE_aresetn_i, RSTCON_NEGATE);
udelay(100);
NX_RSTCON_SetRST(RESETINDEX_OF_DWC_GMAC_MODULE_aresetn_i, RSTCON_ASSERT);
udelay(100);
NX_RSTCON_SetRST(RESETINDEX_OF_DWC_GMAC_MODULE_aresetn_i, RSTCON_NEGATE);
udelay(100);
#endif
gpio_request(CFG_ETHER_GMAC_PHY_RST_NUM, "Ethernet Rst pin");
gpio_direction_output(CFG_ETHER_GMAC_PHY_RST_NUM, 1);
udelay( 100 );
gpio_set_value(CFG_ETHER_GMAC_PHY_RST_NUM, 0);
udelay( 100 );
gpio_set_value(CFG_ETHER_GMAC_PHY_RST_NUM, 1);
gpio_free(CFG_ETHER_GMAC_PHY_RST_NUM);
printk(" -- nxpmac initialize --\n");
return 0;
}
这段代码嘛意思 |
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