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标题: 请问关于RGB,MIPI接口显示屏的调试问题 [打印本页]

作者: dennystc 时间: 2015-8-5 15:51
标题: 请问关于RGB,MIPI接口显示屏的调试问题
请问，刘工，黄工等{:soso_e113:}，我是群里的东风。

按群里提问的，我们找到小尺寸的RGB显示屏，3.5寸640x480的分辨率。以及另外一款MIPI接口显示屏，但是只用了一路lane。硬件部分我们会根据屏的接口定义参考你们发售的显示屏自己做转接板。对于软件部分，按照各位工程师大牛说的，boot以及kernel都支持了，但是因为这两种屏幕和你们官方的显示屏尺寸不同，需要调参数等等，请支持一下，告知我们哪些地方要做相应的修改。具体的调试工作我们自己来做。

谢谢谢谢。

作者: dennystc 时间: 2015-8-6 09:02
附图，MIPI的。

QQ图片20150806090055.png (180.89 KB, 下载次数: 437)

作者: yubang 时间: 2015-8-6 19:42
我们调试了一款7寸的1024x600的4 lane的mipi屏，之后会调5寸的（mipi）手机屏。
7寸的，用的IC是EK79007，uboot中大概的改动如下，供参考：（你先在uboot中把屏点亮吧）

1）
--- a/linux/bootloader/u-boot-2014.07/include/configs/s5p4418_drone2.h
+++ b/linux/bootloader/u-boot-2014.07/include/configs/s5p4418_drone2.h
@@ -622,6 +622,7 @@
/* display out device */
#define CONFIG_DISPLAY_OUT_RGB
#define CONFIG_DISPLAY_OUT_LVDS //hdc 20150422
+ #define CONFIG_DISPLAY_OUT_MIPI //hdc 20150716

2）
--- a/linux/bootloader/u-boot-2014.07/board/s5p4418/drone2/include/cfg_main.h
+++ b/linux/bootloader/u-boot-2014.07/board/s5p4418/drone2/include/cfg_main.h
@@ -76,8 +76,9 @@
  * Display (DPC and MLC)
  */
//#define CONFIG_FB_S3C_AT070TN92 //hdc 20150408
-#define CONFIG_FB_S3C_VS070CXN
+//#define CONFIG_FB_S3C_VS070CXN
//#define CONFIG_FB_S3C_B116XTN04 //lvds lcd 1366x768;hdc 20150422
+#define CONFIG_FB_S3C_WY070ML824CP24B //mipi lcd 1024x600;driver ic EK79007;hdc 20150716

#define CFG_DISP_OUTPUT_MODOLE            0 // 0 : Primary, 1 : Secondary

@@ -146,6 +147,24 @@
#endif

+#ifdef CONFIG_FB_S3C_WY070ML824CP24B //mipi lcd 1024x600;driver ic EK79007;hdc 20150717
+
+#define CFG_DISP_PRI_RESOL_WIDTH       1024 // X Resolution
+#define CFG_DISP_PRI_RESOL_HEIGHT 600 // Y Resolution
+
+#define CFG_DISP_PRI_HSYNC_SYNC_WIDTH          20
+#define CFG_DISP_PRI_HSYNC_BACK_PORCH          140
+#define CFG_DISP_PRI_HSYNC_FRONT_PORCH       160
+#define CFG_DISP_PRI_HSYNC_ACTIVE_HIGH       CTRUE
+#define CFG_DISP_PRI_VSYNC_SYNC_WIDTH          3
+#define CFG_DISP_PRI_VSYNC_BACK_PORCH          20
+#define CFG_DISP_PRI_VSYNC_FRONT_PORCH       12
+#define CFG_DISP_PRI_VSYNC_ACTIVE_HIGH          CTRUE
+#define CFG_DISP_PRI_CLKGEN0_DIV             12 // even divide
+
+#endif

3）
--- a/linux/bootloader/u-boot-2014.07/board/s5p4418/drone2/display.c
+++ b/linux/bootloader/u-boot-2014.07/board/s5p4418/drone2/display.c

+#if defined(CONFIG_DISPLAY_OUT_MIPI) //hdc 20150716
+
+extern void display_mipi(int module, unsigned int fbbase,
+ struct disp_vsync_info *pvsync, struct disp_syncgen_param *psgen,
+ struct disp_multily_param *pmly, struct disp_mipi_param *pmipi);
+
+//#define MIPI_BITRATE_480M
+//#define MIPI_BITRATE_300M //can work but not good;
+//#define MIPI_BITRATE_330M //can work better for WY070ML824CP24B,sometimes flashing;
+#define MIPI_BITRATE_402M //can work very good for WY070ML824CP24B;
+
+
+#ifdef MIPI_BITRATE_1G
+#define PLLPMS 0x33E8
+#define BANDCTL 0xF
+#elif defined(MIPI_BITRATE_900M)
+#define PLLPMS 0x2258
+#define BANDCTL 0xE
+#elif defined(MIPI_BITRATE_840M)
+#define PLLPMS 0x2230
+#define BANDCTL 0xD
+#elif defined(MIPI_BITRATE_750M)
+#define PLLPMS 0x43E8
+#define BANDCTL 0xC
+#elif defined(MIPI_BITRATE_660M)
+#define PLLPMS 0x21B8
+#define BANDCTL 0xB
+#elif defined(MIPI_BITRATE_600M)
+#define PLLPMS 0x2190
+#define BANDCTL 0xA
+#elif defined(MIPI_BITRATE_540M)
+#define PLLPMS 0x2168
+#define BANDCTL 0x9
+#elif defined(MIPI_BITRATE_512M)
+#define PLLPMS 0x03200
+#define BANDCTL 0x9
+#elif defined(MIPI_BITRATE_480M)
+#define PLLPMS 0x2281
+#define BANDCTL 0x8
+#elif defined(MIPI_BITRATE_420M)
+#define PLLPMS 0x2231
+#define BANDCTL 0x7
+#elif defined(MIPI_BITRATE_402M)
+#define PLLPMS 0x2219
+#define BANDCTL 0x7
+#elif defined(MIPI_BITRATE_330M)
+#define PLLPMS 0x21B9
+#define BANDCTL 0x6
+#elif defined(MIPI_BITRATE_300M)
+#define PLLPMS 0x2191
+#define BANDCTL 0x5
+#elif defined(MIPI_BITRATE_210M)
+#define PLLPMS 0x2232
+#define BANDCTL 0x4
+#endif
+#define PLLCTL 0
+#define DPHYCTL 0
+
+#define MIPI_DELAY 0xFF
+#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
+
+struct data_val{
+ u8 data[48];
+};
+
+struct mipi_reg_val{
+ u32 cmd;
+ u32 addr;
+ u32 cnt;
+ struct data_val data;
+};
+
+static struct mipi_reg_val mipi_init_data[]=
+{
+{0x05,0x00, 1, {0x01}},
+{MIPI_DELAY,30, 0, {0}},
+#if 1 //TN paramters;work well for WY070ML824CP24B;
+{0x15, 0x80,  1, {0x47}},
+{0x15, 0x81,  1, {0x40}},
+{0x15, 0x82,  1, {0x04}},
+{0x15, 0x83,  1, {0x77}},
+{0x15, 0x84,  1, {0x0f}},
+{0x15, 0x85,  1, {0x70}},
+{0x15, 0x86,  1, {0x70}},
+#endif
+#if 0 //IPS paramters;
+{0x15, 0xb2,  1, {0x10}},
+{0x15, 0x80,  1, {0x58}},
+{0x15, 0x81,  1, {0x47}},
+{0x15, 0x82,  1, {0xD4}},
+{0x15, 0x83,  1, {0x88}},
+{0x15, 0x84,  1, {0xA9}},
+{0x15, 0x85,  1, {0xC3}},
+{0x15, 0x86,  1, {0x82}},
+#endif
+};
+
+
+static void  mipilcd_dcs_long_write(U32 cmd, U32 ByteCount, U8* pByteData )
+{
+ U32 DataCount32 = (ByteCount+3)/4;
+ int i = 0;
+ U32 index = 0;
+ volatile NX_MIPI_RegisterSet* pmipi = (volatile NX_MIPI_RegisterSet*)IO_ADDRESS(NX_MIPI_GetPhysicalAddress(index));
+
+ NX_ASSERT( 512 >= DataCount32 );
+
+#if 0
+ printf("0x%02x %2d: ", cmd, ByteCount);
+ for(i=0; i< ByteCount; i++)
+ printf("%02x ", pByteData[i]);
+ printf("\n");
+#endif
+
+ for( i=0; i<DataCount32; i++ )
+ {
+ pmipi->DSIM_PAYLOAD = (pByteData[3]<<24)|(pByteData[2]<<16)|(pByteData[1]<<8)|pByteData[0];
+ pByteData += 4;
+ }
+ pmipi->DSIM_PKTHDR  = (cmd & 0xff) | (ByteCount<<8);
+}
+
+static void mipilcd_dcs_write( unsigned int id, unsigned int data0, unsigned int data1 )
+{
+ U32 index = 0;
+ volatile NX_MIPI_RegisterSet* pmipi = (volatile NX_MIPI_RegisterSet*)IO_ADDRESS(NX_MIPI_GetPhysicalAddress(index));
+
+ pmipi->DSIM_PKTHDR = id | (data0<<8) | (data1<<16);
+}
+
+
+static int MIPI_LCD_INIT(int width, int height, void *data)
+{
+ int i=0;
+ int size=ARRAY_SIZE(mipi_init_data);
+ u32 index = 0;
+ u32 value = 0;
+ u8 pByteData[48];
+ u8 bitrate=BANDCTL;
+
+ volatile NX_MIPI_RegisterSet* pmipi = (volatile NX_MIPI_RegisterSet*)IO_ADDRESS(NX_MIPI_GetPhysicalAddress(index));
+ value = pmipi->DSIM_ESCMODE;
+ pmipi->DSIM_ESCMODE = value|(3 << 6);
+ value = pmipi->DSIM_ESCMODE;
+ printf("DSIM_ESCMODE 1 : 0x%x\n", value);
+ value = pmipi->DSIM_STATUS;
+ printf("DSIM_STATUS : 0x%x\n", value);
+ switch(bitrate)
+ {
+ case 0xF: printf("MIPI clk: 1000MHz \n"); break;
+ case 0xE: printf("MIPI clk:  900MHz \n"); break;
+ case 0xD: printf("MIPI clk:  840MHz \n"); break;
+ case 0xC: printf("MIPI clk:  760MHz \n"); break;
+ case 0xB: printf("MIPI clk:  660MHz \n"); break;
+ case 0xA: printf("MIPI clk:  600MHz \n"); break;
+ case 0x9: printf("MIPI clk:  540MHz \n"); break;
+ case 0x8: printf("MIPI clk:  480MHz \n"); break;
+ case 0x7: printf("MIPI clk:  420MHz \n"); break;
+ case 0x6: printf("MIPI clk:  330MHz \n"); break;
+ case 0x5: printf("MIPI clk:  300MHz \n"); break;
+ case 0x4: printf("MIPI clk:  210MHz \n"); break;
+ case 0x3: printf("MIPI clk:  180MHz \n"); break;
+ case 0x2: printf("MIPI clk:  150MHz \n"); break;
+ case 0x1: printf("MIPI clk:  100MHz \n"); break;
+ case 0x0: printf("MIPI clk: 80MHz \n"); break;
+ default : printf("MIPI clk:  unknown \n"); break;
+ }
+
+ mdelay(10);
+
+ for(i=0; i<size; i++)
+ {
+ switch(mipi_init_data[i].cmd)
+ {
+ case 0x05:
+ mipilcd_dcs_write(mipi_init_data[i].cmd, mipi_init_data[i].data.data[0], 0x00);
+ break;
+ case 0x15:
+ mipilcd_dcs_write(mipi_init_data[i].cmd, mipi_init_data[i].addr, mipi_init_data[i].data.data[0]);
+ break;
+ case 0x29:
+ case 0x39:
+ pByteData[0] = mipi_init_data[i].addr;
+ memcpy(&pByteData[1], &mipi_init_data[i].data.data[0], 48);
+ mipilcd_dcs_long_write(mipi_init_data[i].cmd, mipi_init_data[i].cnt+1, &pByteData[0]);
+ break;
+ case MIPI_DELAY:
+ mdelay(mipi_init_data[i].addr);
+ break;
+ }
+ }
+
+ value = pmipi->DSIM_ESCMODE;
+ pmipi->DSIM_ESCMODE = value&(~(3 << 6));
+ value = pmipi->DSIM_ESCMODE;
+ printf("DSIM_ESCMODE 2 : 0x%x\n", value);
+ value = pmipi->DSIM_STATUS;
+ printf("DSIM_STATUS : 0x%x\n", value);
+ //mdelay(10);
+ return 0;
+}
+
+
+#define INIT_VIDEO_SYNC(name) \
+ struct disp_vsync_info name = { \
+ .h_active_len = CFG_DISP_PRI_RESOL_WIDTH,       \
+ .h_sync_width = CFG_DISP_PRI_HSYNC_SYNC_WIDTH, \
+ .h_back_porch = CFG_DISP_PRI_HSYNC_BACK_PORCH, \
+ .h_front_porch = CFG_DISP_PRI_HSYNC_FRONT_PORCH, \
+ .h_sync_invert = CFG_DISP_PRI_HSYNC_ACTIVE_HIGH, \
+ .v_active_len = CFG_DISP_PRI_RESOL_HEIGHT,       \
+ .v_sync_width = CFG_DISP_PRI_VSYNC_SYNC_WIDTH, \
+ .v_back_porch = CFG_DISP_PRI_VSYNC_BACK_PORCH, \
+ .v_front_porch = CFG_DISP_PRI_VSYNC_FRONT_PORCH, \
+ .v_sync_invert = CFG_DISP_PRI_VSYNC_ACTIVE_HIGH, \
+ .pixel_clock_hz = CFG_DISP_PRI_PIXEL_CLOCK,    \
+ .clk_src_lv0 = CFG_DISP_PRI_CLKGEN0_SOURCE,    \
+ .clk_div_lv0 = CFG_DISP_PRI_CLKGEN0_DIV,       \
+ .clk_src_lv1 = CFG_DISP_PRI_CLKGEN1_SOURCE,    \
+ .clk_div_lv1 = CFG_DISP_PRI_CLKGEN1_DIV,       \
+ };
+
+#define INIT_PARAM_SYNCGEN(name) \
+ struct disp_syncgen_param name = { \
+ .interlace = CFG_DISP_PRI_MLC_INTERLACE,    \
+ .out_format = CFG_DISP_PRI_OUT_FORMAT,       \
+ .lcd_mpu_type = 0,                               \
+ .invert_field = CFG_DISP_PRI_OUT_INVERT_FIELD, \
+ .swap_RB = CFG_DISP_PRI_OUT_SWAPRB,       \
+ .yc_order = CFG_DISP_PRI_OUT_YCORDER,       \
+ .delay_mask = 0,                               \
+ .vclk_select = CFG_DISP_PRI_PADCLKSEL,          \
+ .clk_delay_lv0 = CFG_DISP_PRI_CLKGEN0_DELAY,    \
+ .clk_inv_lv0 = CFG_DISP_PRI_CLKGEN0_INVERT,    \
+ .clk_delay_lv1 = CFG_DISP_PRI_CLKGEN1_DELAY,    \
+ .clk_inv_lv1 = CFG_DISP_PRI_CLKGEN1_INVERT,    \
+ .clk_sel_div1 = CFG_DISP_PRI_CLKSEL1_SELECT, \
+ };
+
+#define INIT_PARAM_MULTILY(name) \
+ struct disp_multily_param name = { \
+ .x_resol = CFG_DISP_PRI_RESOL_WIDTH, \
+ .y_resol = CFG_DISP_PRI_RESOL_HEIGHT, \
+ .pixel_byte = CFG_DISP_PRI_SCREEN_PIXEL_BYTE, \
+ .fb_layer = CFG_DISP_PRI_SCREEN_LAYER, \
+ .video_prior = CFG_DISP_PRI_VIDEO_PRIORITY, \
+ .mem_lock_size = 16, \
+ .rgb_format = CFG_DISP_PRI_SCREEN_RGB_FORMAT, \
+ .bg_color = CFG_DISP_PRI_BACK_GROUND_COLOR, \
+ .interlace = CFG_DISP_PRI_MLC_INTERLACE, \
+ };
+
+#define INIT_PARAM_LVDS(name) \
+ struct disp_lvds_param name = { \
+ .lcd_format = CFG_DISP_LVDS_LCD_FORMAT,       \
+ };
+
+
+#define INIT_PARAM_MIPI(name) \
+ struct disp_mipi_param name = { \
+ .pllpms = PLLPMS,    \
+ .bandctl = BANDCTL,    \
+ .pllctl = PLLCTL, \
+ .phyctl = DPHYCTL,    \
+ .lcd_init = MIPI_LCD_INIT \
+ };
+
+int bd_display(void)
+{
+ INIT_VIDEO_SYNC(vsync);
+ INIT_PARAM_SYNCGEN(syncgen);
+ INIT_PARAM_MULTILY(multily);
+
+
+#if defined(CONFIG_DISPLAY_OUT_MIPI)
+ INIT_PARAM_MIPI(mipi);
+
+ /*
+    * set multilayer parameters
+    */
+ multily.x_resol =  1024;
+ multily.y_resol = 600;
+
+ /*
+    * set vsync parameters
+    */
+#if 1
+ vsync.h_active_len =  1024; //for WY070ML824CP24B work well;
+ vsync.v_active_len = 600;
+ vsync.h_sync_width = 20;
+ vsync.h_back_porch = 140;
+ vsync.h_front_porch = 160;
+ vsync.v_sync_width = 3;
+ vsync.v_back_porch = 20;
+ vsync.v_front_porch = 12;
+#else
+ vsync.h_active_len =  1024; //for WY070ML824CP24B can not work;
+ vsync.v_active_len = 600;
+ vsync.h_sync_width = 10;
+ vsync.h_back_porch = 160;
+ vsync.h_front_porch = 160;
+ vsync.v_sync_width = 1;
+ vsync.v_back_porch = 23;
+ vsync.v_front_porch = 12;
+#endif
+
+ /*
+    * set syncgen parameters
+    */
+ syncgen.delay_mask = DISP_SYNCGEN_DELAY_RGB_PVD | DISP_SYNCGEN_DELAY_HSYNC_CP1 |
+       DISP_SYNCGEN_DELAY_VSYNC_FRAM | DISP_SYNCGEN_DELAY_DE_CP;
+
+ syncgen.d_rgb_pvd = 0;
+ syncgen.d_hsync_cp1 = 0;
+ syncgen.d_vsync_fram = 0;
+ syncgen.d_de_cp2 = 7;
+ syncgen.vs_start_offset = (vsync.h_front_porch + vsync.h_sync_width +
+ vsync.h_back_porch + vsync.h_active_len - 1);
+ syncgen.ev_start_offset = (vsync.h_front_porch + vsync.h_sync_width +
+ vsync.h_back_porch + vsync.h_active_len - 1);
+ syncgen.vs_end_offset = 0;
+ syncgen.ev_end_offset = 0;
+
+ lcd_draw_boot_logo(CONFIG_FB_ADDR, multily.x_resol, multily.y_resol, multily.pixel_byte);
+
+ printf("DRAW BOOT LOGO WITH MIPI (  DRAW.KIMCH3.......)\n");
+ display_mipi(CFG_DISP_OUTPUT_MODOLE, CONFIG_FB_ADDR,
+ &vsync, &syncgen, &multily, &mipi);
+#endif
+ return 0;
+}
+
+
+#endif

涉及到屏的初始化的是这个结构：
static struct mipi_reg_val mipi_init_data[]

以上，仅供参考。

作者: yubang 时间: 2015-8-6 19:45
见回复。

作者: yubang 时间: 2015-8-6 19:46

dennystc 发表于 2015-8-6 09:02
附图，MIPI的。

见回复

作者: studylinuxlong 时间: 2016-3-3 15:07
学习了~

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